EZ-USB FX2LP™ USB Microcontroller High Speed USB Peripheral Controller

Features (CY7C68013A/14A/15A/16A)

■ USB 2.0 USB IF High Speed Certified (TID # 40460272)

■ Single Chip Integrated USB 2.0 Transceiver, Smart SIE, and Enhanced 8051 Microprocessor

■ Fit, Form, and Function Compatible with the FX2

❐ Pin compatible

❐ Object-code-compatible

❐ Functionally Compatible (FX2LP is a superset)

■ Ultra Low Power: ICC No More than 85 mA in any Mode

❐ Ideal for bus and battery powered applications

■ Software: 8051 Code Runs from:

❐ Internal RAM, which is downloaded through USB

❐ Internal RAM, which is loaded from EEPROM

❐ External memory device (128 pin package)

■ 16 KBytes of On-Chip Code/Data RAM

■ Four Programmable BULK/INTERRUPT/ISOCHRONOUS Endpoints

❐ Buffering options: double, triple, and quad

■ Additional Programmable (BULK/INTERRUPT) 64 Byte Endpoint

■ 8-bit or 16-bit External Data Interface

■ Smart Media Standard ECC Generation

Logic Block Diagram

  Cypress’s EZ-USB FX2LP™ (CY7C68013A/14A) is a low power version of the EZ-USB FX2™ (CY7C68013), which is a highly integrated, low power USB 2.0 microcontroller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip,

  Cypress has created a cost effective solution that provides superior time-to-market advantages with low power to enable bus powered applications.  

  The ingenious architecture of FX2LP results in data transfer rates of over 53 Mbytes per second, the maximum allowable USB 2.0 bandwidth, while still using a low cost 8051 microcontroller in a package as small as a 56 VFBGA (5 mm x 5 mm). Because it incorporates the USB 2.0 transceiver, the FX2LP is more economical, providing a smaller footprint solution than USB 2.0 SIE or external transceiver implementations. With EZ-USB FX2LP, the Cypress Smart SIE handles most of the USB 1.1 and 2.0 protocol in hardware, freeing the embedded microcontroller for application specific functions and decreasing development time to ensure USB compatibility.