The GW2A/GW2AR series FPGA products offer programmable logic solutions with comprehensive features including:

• High-density programmable logic architecture
• Flexible configuration options
• Advanced clock management with PLLs
• Multiple I/O bank support

The GW2A/GW2AR series FPGA products require multiple voltage types:

• Core voltage (VCC)
• PLL voltage (VCCPLL)
• Auxiliary voltage (VCCX)
• Bank voltage (VCCIO)

The FPGA supports multiple configuration methods:

Used for downloading bitstream data to FPGA SRAM, on-chip flash, or external flash memory.

As a master device, MSPI configuration mode automatically reads configuration data from external flash and sends it to FPGA SRAM.

The device features comprehensive clock management capabilities:

• GCLK global clock pins distributed in four quadrants
• Eight GCLK networks per quadrant
• PLL support for frequency, phase, and duty cycle adjustment

The device supports LVDS (Low Voltage Differential Signaling) features:

• All banks support True LVDS output
• BANK0/1 support 100Ω differential input resistance
• Requires 100Ω termination resistor for differential input

• RECONFIG_N: Reset function for FPGA programming
• READY: Indicates FPGA is ready for configuration
• DONE: Signals successful FPGA configuration

Standard export packaging available. Customers can choose from:

• Carton boxes
• Wooden cases
• Wooden pallets