XC2V6000 XC2V8000  XILINX Virtex FPGA ICs

XC2V6000-4FF1152C
XC2V6000-4FF1152I
XC2V6000-5FF1517C
XC2V8000-5FF1517C

Features:

• Very low cost, high-performance logic solution for high-volume, cost-conscious applications

• Dual-range VCCAUX supply simplifies 3.3V-only design

• Suspend, Hibernate modes reduce system power

• Multi-voltage, multi-standard SelectIO™ interface pins

• Up to 502 I/O pins or 227 differential signal pairs

• LVCMOS, LVTTL, HSTL, and SSTL single-ended I/O

• 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling

• Selectable output drive, up to 24 mA per pin

• QUIETIO standard reduces I/O switching noise

• Full 3.3V ± 10% compatibility and hot swap compliance.

• 640+ Mb/s data transfer rate per differential I/O

• LVDS, RSDS, mini-LVDS, HSTL/SSTL differential I/O with integrated differential termination resistors

• Enhanced Double Data Rate (DDR) support

• DDR/DDR2 SDRAM support up to 400 Mb/s

• Fully compliant 32-/64-bit, 33/66 MHz PCI® technology support

• Abundant, flexible logic resources • Densities up to 25,344 logic cells, including optional shift register or distributed RAM support

• Efficient wide multiplexers, wide logic

• Fast look-ahead carry logic

• Enhanced 18 x 18 multipliers with optional pipeline

• IEEE 1149.1/1532 JTAG programming/debug port

• Hierarchical SelectRAM™ memory architecture

• Up to 576 Kbits of fast block RAM with byte write enables for processor applications

• Up to 176 Kbits of efficient distributed RAM

• Up to eight Digital Clock Managers (DCMs)

• Clock skew elimination (delay locked loop)

• Frequency synthesis, multiplication, division

• High-resolution phase shifting

• Wide frequency range (5 MHz to over 320 MHz)

• Eight low-skew global clock networks, eight additional clocks per half device, plus abundant low-skew routing

• Configuration interface to industry-standard PROMs

• Low-cost, space-saving SPI serial Flash PROM

• x8 or x8/x16 BPI parallel NOR Flash PROM

• Low-cost Xilinx® Platform Flash with JTAG

• Unique Device DNA identifier for design authentication

• Load multiple bitstreams under FPGA control

• Post-configuration CRC checking

• Complete Xilinx ISE® and WebPACK™ development system software support plus Spartan-3A Starter Kit

• MicroBlaze™ and PicoBlaze embedded processors

• Low-cost QFP and BGA packaging, Pb-free options

• Common footprints support easy density migration

• Compatible with select Spartan-3AN nonvolatile FPGAs

• Compatible with higher density Spartan-3A DSP FPGAs

• XA Automotive version available

Related products :

Spartan-3A FPGA        Status

XC3S50A               Production

XC3S200A             Production

XC3S400A             Production

XC3S700A             Production

XC3S1400A           Production

XC3S50A –4 Standard Performance VQ100/ VQG100 100-pin Very Thin Quad Flat Pack (VQFP) C Commercial (0°C to 85°C)

XC3S200A –5 High Performance (Commercial only) TQ144/ TQG144 144-pin Thin Quad Flat Pack (TQFP) I Industrial (–40°C to 100°C) XC3S400A FT256/ FTG256 256-ball Fine-Pitch Thin Ball Grid Array (FTBGA)

XC3S700A FG320/ FGG320 320-ball Fine-Pitch Ball Grid Array (FBGA)

XC3S1400A FG400/ FGG400 400-ball Fine-Pitch Ball Grid Array (FBGA)

XC3S1400A FG484/ FGG484 484-ball Fine-Pitch Ball Grid Array (FBGA)

XC3S1400A  FG676 FGG676 676-ball Fine-Pitch Ball Grid Array (FBGA)

XC3S50(2) 50K 1,728 16 12 192 12K 72K 4 2 124 56

XC3S200(2) 200K 4,320 24 20 480 30K 216K 12 4 173 76

XC3S400(2) 400K 8,064 32 28 896 56K 288K 16 4 264 116

XC3S1000(2) 1M 17,280 48 40 1,920 120K 432K 24 4 391 175

XC3S1500 1.5M 29,952 64 52 3,328 208K 576K 32 4 487 221

XC3S2000 2M 46,080 80 64 5,120 320K 720K 40 4 565 270

XC3S4000 4M 62,208 96 72 6,912 432K 1,728K 96 4 633 300

XC3S5000 5M 74,880 104 80 8,320 520K 1,872K 104 4 633 300

For more information on stock availability of the Spartan-3A FPGA family,Please feel free to send email : sales@icschip.com