15.6" Industrial Sunlight Readable TFT LCD Display - 1500nits FHD, Wide Temperature, LVDS Interface
Unmatched Visibility in Harsh Environments
The SFTO1560RX-7312AN 15.6" High-Brightness TFT LCD Display delivers 1500nits luminance for crystal-clear visibility under direct sunlight. Engineered for industrial applications, this FHD (1920×1080) display features an anti-glare 3H hard coating and operates flawlessly from -30°C to 85°C – ideal for outdoor kiosks, transportation systems, and heavy machinery.
Key Technical Advantages
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Industrial Durability: Passes thermal shock (-30°C↔85°C), vibration (10-55Hz), and ±12kV ESD tests.
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Long-Lifetime Backlight: 50,000-hour LED system with 45.1V input (540mA typ).
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Flexible Integration: LVDS interface with reverse scan control (REV_SCAN pin) for versatile mounting.
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True Color Performance: 72% NTSC color gamut and 800:1 contrast ratio.
Certified Reliability
ISO 9001/14001 certified and compliant with EU RoHS/REACH standards. Includes 1-year functional warranty.
Ideal For:
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Outdoor Digital Signage
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Construction & Agricultural Equipment
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Aviation Cockpit Displays
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Marine Navigation Systems
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Medical Devices
Request a Sample: Contact our EU/US support team at sales2@saef.com.cn for industrial pricing and customization options.
Specifications
| Item | Specification | Unit |
| Screen Size | 15.6” real diagonal | |
| Beael Opening | 365.72x220.39x12.5 | mm |
| Pixel Number | 1920 x R.G.B. x 1080 | pixel |
| Pixel Pitch | 0.17925 (H) x 0.17925 (V) | mm |
| Display Area | 344.16x193.59 | mm |
| Display Colors | 16.7M | color |
| Transmissive Mode | Normally Black | - |
| Surface Treatment | AG type, 3H hard coating, | - |
| Power Consumption | Total cell | |
| TC | 8100 | k |
| NTSC | 72 (Typ) | % |
External Dimensions
Interface Pin Definition
| Pin | Name | Description |
| 1 | NC | Not connection, this pin should be open |
| 2 | NC | Not connection, this pin should be open |
| 3 | NC | Not connection, this pin should be open |
| 4 | NC | Not connection, this pin should be open |
| 5 | NC | Not connection, this pin should be open |
| 6 | NC | Not connection, this pin should be open |
| 7 | NC | Not connection, this pin should be open |
| 8 | NC | Not connection, this pin should be open |
| 9 | NC | Not connection, this pin should be open |
| 10 | NC | Not connection, this pin should be open |
| 11 | LCD_VCC | LCD logic and driver power 3.3V |
| 12 | LCD_VCC | LCD logic and driver power 3.3V |
| 13 | LCD_VCC | LCD logic and driver power 3.3V |
| 14 | NC | Not connection, this pin should be open |
| 15 | NC | Not connection, this pin should be open |
| 16 | NC | Not connection, this pin should be open |
| 17 | REV_SCAN |
Low → Normal Mode. High → Horizontal & Vertical Reverse Scan |
| 18 | RXO0- | Negative LVDS differential data input. Channel O0 (odd) |
| 19 | RXO0+ | Positive LVDS differential data input. Channel O0 (odd) |
| 20 | RXO1- | Negative LVDS differential data input. Channel O1 (odd) |
| 21 | RXO1+ | Positive LVDS differential data input. Channel O1 (odd) |
| 22 | RXO2- | Negative LVDS differential data input. Channel O2 (odd) |
| 23 | RXO2+ | Positive LVDS differential data input. Channel O2 (odd) |
| 24 | LCD GND | LCD logic and driver ground |
| 25 | RXOC- | Negative LVDS differential clock input. (odd) |
| 26 | RXOC+ | Positive LVDS differential clock input. (odd) |
| 27 | LCD GND | LCD logic and driver ground |
| 28 | RXO3- | Negative LVDS differential data input. Channel O3(odd) |
| 29 | RXO3+ | Positive LVDS differential data input. Channel O3 (odd) |
| 30 | RXE0- | Negative LVDS differential data input. Channel E0 (even) |
| 31 | RXE0+ | Positive LVDS differential data input. Channel E0 (even) |
| 32 | RXE1- | Negative LVDS differential data input. Channel E1 (even) |
| 33 | RXE1+ | Positive LVDS differential data input. Channel E1 (even) |
| 34 | LCD GND | LCD logic and driver ground |
| 35 | RXE2- | Negative LVDS differential data input. Channel E2 (even) |
| 36 | RXE2+ | Positive LVDS differential data input. Channel E2 (even) |
| 37 | RXEC- | Negative LVDS differential clock input. (even) |
| 38 | RXEC+ | Positive LVDS differential clock input. (even) |
| 39 | RXE3- | Negative LVDS differential data input. Channel E3 (even) |
| 40 | RXE3+ | Positive LVDS differential data input. Channel E3 (even) |
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