Dual inverter Integrated Circuit Chip 74LVC2GU04GV,125 1.65 V to 5.5 V
FEATURES
• Wide supply voltage range from 1.65 V to 5.5 V
• 5 V tolerant input/output for interfacing with 5 V logic
• High noise immunity
• ESD protection:
– HBM EIA/JESD22-A114-B exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• Latch-up performance exceeds 250 mA
• Multiple package options
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
DESCRIPTION
The 74LVC2GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
The 74LVC2GU04 provides two inverters. Each inverter is a single stage with unbuffered output.
| SYMBOL | PARAMETER | CONDITIONS | TYPICAL | UNIT |
| tPHL/tPLH |
propagation delay input nA to output nY |
VCC = 1.8 V; CL = 30 pF; RL =1kΩ | 2.3 | ns |
| VCC = 2.5 V; CL = 30 pF; RL = 500 Ω | 1.8 | ns | ||
| VCC = 2.7 V; CL = 50 pF; RL = 500 Ω | 2.6 | ns | ||
| VCC = 3.3 V; CL = 50 pF; RL = 500 Ω | 2.3 | ns | ||
| CI | input capacitance | 5 | pF | |
| CPD | power dissipation capacitance per gate | VCC = 3.3 V; notes 1 and 2 | pF |
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