CD74HCT4051M96 High Speed CMOS Logic Analog Multiplexers / Demultiplexers

CD54/74HC4051, CD54/74HCT4051, CD54/74HC4052,

CD74HCT4052, CD54/74HC4053, CD74HCT4053

High-Speed CMOS Logic Analog Multiplexers/Demultiplexers

Features

• Wide Analog Input Voltage Range . . . . . . . . . . ±5V Max

• Low “On” Resistance

  - 70Ω Typical (V_CC - V_EE = 4.5V)

  - 40Ω Typical (V_CC - V_EE = 9V)

• Low Crosstalk between Switches

• Fast Switching and Propagation Speeds

• “Break-Before-Make” Switching

• Wide Operating Temperature Range . . -55℃ to 125℃

• CD54HC/CD74HC Types

  - Operation Control Voltage . . . . . . . . . . . . . . 2V to 6V

  - Switch Voltage . . . . . . . . . . . . . . . . . . . . . . . 0V to 10V

  - High Noise Immunity . . . N_IL = 30%, N_IH = 30% of V_CC, V_CC = 5V

• CD54HCT/CD74HCT Types

  - Operation Control Voltage . . . . . . . . . . . 4.5V to 5.5V

  - Switch Voltage . . . . . . . . . . . . . . . . . . . . . . . 0V to 10V

  - Direct LSTTL Input

    Logic Compatibility . . . V_IL = 0.8V Max, V_IH = 2V Min

  - CMOS Input Compatibility. . . . . I_I ≤ 1µA at V_OL, V_OH

Description

These devices are digitally controlled analog switches which utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers/demultiplexers control analog voltages that may vary across the voltage supply range (i.e. V_CC to V_EE). They are bidirectional switches thus allowing any analog input to be used as an output and vice-versa. The switches have low “on” resistance and low “off” leakages. In addition, all three devices have an enable control which, when high, disables all switches to their “off” state.

Pinouts

Absolute Maximum Ratings (Note 2)

DC Supply Voltage, V_CC - V_EE . . . . . . . . . . . . . . . . . -0.5V to 10.5V

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V

DC Supply Voltage, V_EE . . . . . . . . . . . . . . . . . . . . . . . +0.5V to -7V

DC Input Diode Current, I_IK

    For V_I < -0.5V or V_I > V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . ±20mA

DC Switch Diode Current, I_OK

    For V_I < V_EE -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . ±20mA

DC Switch Current, (Note 2)

    For V_I > V_EE -0.5V or V_I < V_CC + 0.5V . . . . . . . . . . . . . . . . . ±25mA

DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . . . . ±50mA

DC V_EE Current, I_EE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  -20mA

Thermal Information

Package Thermal Impedance, θ_JA (see Note 1):

    E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67℃/W

    M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73℃/W

    NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64℃/W

    PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .108℃/W

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150℃

Maximum Storage Temperature Range . . . . . . . . . .  -65℃ to 150℃

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300℃

NOTE:

1. The package thermal impedance is calculated in accordance with JESD 51-7.

2. All voltages referenced to GND unless otherwise specified..

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