FUNCTIONAL DESCRIPTION

The AS7C256 is a high performance CMOS 262,144-bit Static Random Access Memory (SRAM) organized as 32,768 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

 

 

FEATURES

• Organization: 32,768 words × 8 bits
• High speed
– 10/12/15/20/25/35 ns address access time
– 3/3/4/5/6/8 ns output enable access time
• Low power consumption
– Active: 660 mW max (10 ns cycle)
– Standby: 11 mW max, CMOS I/O 2.75 mW max, CMOS I/O, L version
– Very low DC component in active power
• 2.0V data retention (L version)
• Equal access and cycle times
• Easy memory expansion with CE and OE inputs
• TTL-compatible, three-state I/O
• 28-pin JEDEC standard packages
– 300 mil PDIP and SOJ Socket compatible with 7C512 and 7C1024
– 330 mil SOIC
– 8×13.4 TSOP
• ESD protection > 2000 volts
• Latch-up current > 200 mA