DRAM dynamic random access memory chip 512MB 16-bit FBGA-96 H5TQ4G63EFR-RDC is a 4,294,967,296-bit CMOS dual data rate III (DDR3) synchronous DRAM, highly suitable for main memory applications requiring high-density memory and high bandwidth.

SK Hynix 4Gb DDR3 SDRAM offers fully synchronous operation, referring to the rising and falling edges of the clock. All address and control inputs are latched at the rising edge of CK, while Data, Data strobes and Write data masks inputs are sampled at both rising and falling edges.

• VDD=VDDQ=1.5V ± 0.075V
• Fully differential clock input (CK, CK)
• Differential data selection communication number (DQS, DQS)
• Align on-chip DLLS with DQ, DQS, and DQS transition
• DM mask writes data to rising/falling edges of data selection signal
• Supports programmable CAS delays of 5,6,7,8,9,10,11,13 and 14
• Programmable burst length of 4/8 with sequential and interleaved patterns
• 8 storage units
• Commercial (0°C to 95°C), Industrial (-40°C to 95°C), and Automotive (-40°C to 105°C) temperature options
• JEDEC standard 78-ball FBGA(x8), 96-ball FBGA(x16)
• 8-bit prefetch architecture

Standard export packaging available. Customers can choose from cartons, wooden cases and wooden pallets according to requirements.