Ultra Low Jitter I2C Programmable Crystal Oscillator SKYWORKS 548BAAB000111CCG with Custom Frequency Samples
Price:
Negotiable
MOQ:
Negotiable
Delivery Time:
Negotiable
Product Description
Product Overview
The Skyworks Solutions Si548 Ultra Series Crystal Oscillator is an I2C programmable XO utilizing advanced 4th generation DSPLL technology to deliver ultra-low jitter and low phase noise clock signals. It offers user-programmable frequencies from 0.2 to 1500 MHz with
Product Attributes
- Brand: Skyworks Solutions
- Series: Ultra Series
- Technology: DSPLL
- Package Size: 2.5x3.2 mm
Technical Specifications
| Parameter | Symbol | Test Condition/Comment | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Temperature Range | TA | 40 | 85 | C | ||
| Frequency Range | FCLK | LVPECL, LVDS, CML | 0.2 | 1500 | MHz | |
| Frequency Range | FCLK | HCSL | 0.2 | 400 | MHz | |
| Frequency Range | FCLK | CMOS, Dual CMOS | 0.2 | 250 | MHz | |
| Supply Voltage | VDD | 3.3 V | 3.135 | 3.3 | 3.465 | V |
| Supply Voltage | VDD | 2.5 V | 2.375 | 2.5 | 2.625 | V |
| Supply Voltage | VDD | 1.8 V | 1.71 | 1.8 | 1.89 | V |
| Supply Current | IDD | LVPECL (output enabled) | 107 | 153 | mA | |
| Supply Current | IDD | LVDS/CML (output enabled) | 83 | 121 | mA | |
| Supply Current | IDD | HCSL (output enabled) | 86 | 126 | mA | |
| Supply Current | IDD | HCSL-Fast (output enabled) | 94 | 138 | mA | |
| Supply Current | IDD | CMOS (output enabled) | 87 | 127 | mA | |
| Supply Current | IDD | Dual CMOS (output enabled) | 92 | 141 | mA | |
| Supply Current | IDD | Tristate (output disabled) | 73 | 112 | mA | |
| Temperature Stability | Grade A | 20 | 20 | ppm | ||
| Temperature Stability | Grade B | 10 | 10 | ppm | ||
| Temperature Stability | Grade C | 7 | 7 | ppm | ||
| Total Stability | FSTAB | Grade A (Includes temp, initial, load, VDD, 20yr aging) | 50 | 50 | ppm | |
| Total Stability | FSTAB | Grade B (Includes temp, initial, load, VDD, 20yr aging) | 25 | 25 | ppm | |
| Total Stability | FSTAB | Grade C (Includes temp, initial, load, VDD, 20yr aging) | 20 | 20 | ppm | |
| Rise/Fall Time | TR/TF | LVPECL/LVDS/CML | 350 | ps | ||
| Rise/Fall Time | TR/TF | CMOS / Dual CMOS (CL = 5 pF) | 0.5 | 1.5 | ns | |
| Rise/Fall Time | TR/TF | HCSL, FCLK >50 MHz | 550 | ps | ||
| Rise/Fall Time | TR/TF | HCSL-Fast, FCLK >50 MHz | 275 | ps | ||
| Duty Cycle | DC | All formats | 45 | 55 | % | |
| Powerup Time | tOSC | Time from 0.9 VDD until output frequency within spec | 10 | ms | ||
| Powerup VDD Ramp Rate | VRAMP | Fastest VDD rate allowed on startup | 100 | V/ms | ||
| LVPECL Output Option | VOC | Mid-level | VDD 1.42 | VDD 1.25 | V | |
| LVPECL Output Option | VO Swing (diff) | 1.1 | 1.9 | VPP | ||
| LVDS Output Option | VOC | Mid-level (2.5 V, 3.3 V VDD) | 1.125 | 1.20 | 1.275 | V |
| LVDS Output Option | VOC | Mid-level (1.8 V VDD) | 0.8 | 0.9 | 1.0 | V |
| LVDS Output Option | VO Swing (FCLK 1.4 GHz) | 0.6 | 0.7 | 0.9 | VPP | |
| LVDS Output Option | VO Swing (FCLK > 1.4 GHz) | 0.5 | 0.7 | 0.9 | VPP | |
| HCSL Output Option | VOH | 660 | 750 | 850 | mV | |
| HCSL Output Option | VOL | 150 | 0 | 150 | mV | |
| HCSL Output Option | VC Crossing voltage | 250 | 350 | 550 | mV | |
| CML Output Option (AC-Coupled) | VO Swing (diff) | 0.6 | 0.8 | 1.0 | VPP | |
| CMOS Output Option | VOH | IOH = 8/6/4 mA for 3.3/2.5/1.8V VDD | 0.85 VDD | V | ||
| CMOS Output Option | VOL | IOL = 8/6/4 mA for 3.3/2.5/1.8V VDD | 0.15 VDD | V | ||
| Frequency Reprogramming Resolution | MRES | 0.026 | ppb | |||
| Frequency Range for Small Frequency Change | From center frequency | -950 | +950 | ppm | ||
| Settling Time for Small Frequency Change | < 950 ppm from center frequency | 100 | s | |||
| Settling Time for Large Frequency Change | > 950 ppm from center frequency | 40 | ms | |||
| Phase Jitter (RMS, 12 kHz - 20MHz) | J | All Differential Formats, FCLK 200 MHz | 95 | 150 | fs | |
| Phase Jitter (RMS, 12 kHz - 20MHz) | J | All Differential Formats, 100 MHz FCLK < 200 MHz | 115 | 150 | fs | |
| Phase Jitter (RMS, 12kHz - 20MHz) | J | CMOS / Dual CMOS Formats, 10 MHz FCLK 250 MHz | 200 | fs | ||
| Additive Phase Jitter with I2C Lines Active | J | (12 kHz - 20 MHz), FCLK 200 MHz | 15 | fs | ||
| Spurs Induced by External Power Supply Noise | PSNR | 50 mVpp Ripple, LVDS 156.25 MHz Output, 100 kHz sine wave | -83 | dBc | ||
| Mechanical Shock | MIL-STD-883, Method 2002 | |||||
| Mechanical Vibration | MIL-STD-883, Method 20007 | |||||
| Solderability | MIL-STD-883, Method 2003 | |||||
| Gross and Fine Leak | MIL-STD-883, Method 1014 | |||||
| Resistance to Solder Heat | MIL-STD-883, Method 2036 | |||||
| Moisture Sensitivity Level (MSL) | 2.5 x 3.2 package | 2 | ||||
| Contact Pads | 2.5x3.2 packages Au/Pd/Ni | 0.03 - 0.12 m / 0.1 - 0.2 m / 3.0 - 8.0 m | ||||
| Thermal Resistance | JA | 2.5 x 3.2 mm 6-pin DFN, Still Air, 85 C | 80 | C/W | ||
| Thermal Parameter | JB | Still Air, 85 C | 39 | C/W | ||
| Thermal Parameter | JT | Still Air, 85 C | 17 | C/W | ||
| Maximum Junction Temperature | 125 | C | ||||
| Maximum Operating Temp. | TAMAX | 95 | C | |||
| Storage Temperature | TS | 55 | 125 | C | ||
| Supply Voltage | VDD | Absolute Maximum | 0.5 | 3.8 | V | |
| Input Voltage | VIN | Absolute Maximum | 0.5 | VDD + 0.3 | V | |
| ESD HBM | (JESD22-A114) | 2.0 | kV | |||
| Solder Temperature | TPEAK | 260 | C | |||
| Solder Time at TPEAK | TP | 2040 | sec |
Applications
- 100G/200G/400G OTN, coherent optics, PAM4
- 10G/40G/100G optical ethernet
- 3G-SDI/12G-SDI/24G-SDI broadcast video
- Servers, switches, storage, search acceleration
- Test and measurement
- FPGA/ASIC clocking
Get in Touch
Have questions about our products or want to discuss a custom order? Our team is ready to help you.
Company
Beijing Silk Road Enterprise Management Services Co., Ltd.
Location
16 Floor, Unit B, Jiatai International Mansion, No 41, Dongsihuan Zhong Road, Chaoyang District, Beijing
Contact Person
Sellina