Stable frequency generation SKYWORKS 511EAA-AAAG oscillator optimized for SONET SDH OTN and speed data interfaces
Product Overview
The Skyworks Si510/511 Crystal Oscillator (XO) utilizes advanced DSPLL technology to provide any frequency from 100 kHz to 250 MHz from a single fixed crystal. This IC-based approach enhances reliability, mechanical robustness, and stability, while offering superior supply noise rejection for low jitter clock generation in noisy environments. The Si510/511 is factory-configurable for user-specific requirements, including frequency, supply voltage, output format, and stability, with lead times as short as 2-4 weeks. It is ideal for applications such as SONET/SDH/OTN, Gigabit Ethernet, Fibre Channel/SAS/SATA, PCI Express, 3G-SDI/HD-SDI/SDI, Telecom, Switches/routers, and FPGA/ASIC clock generation.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL
- Certifications: Pb-free, RoHS compliant
- Package Options: 5 x 7 mm, 3.2 x 5 mm, 2.5 x 3.2 mm
- Output Options: Differential (LVPECL, LVDS, HCSL) or CMOS
- Supply Voltage Options: 3.3, 2.5, or 1.8 V
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
| Operating Specifications | ||||||
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | ||
| 1.8 V option | 1.71 | 1.8 | 1.89 | V | ||
| Supply Current (CMOS, 100 MHz, single-ended) | IDD | 21 | 26 | mA | ||
| Supply Current (LVDS, output enabled) | IDD | 19 | 23 | mA | ||
| Supply Current (LVPECL, output enabled) | IDD | 39 | 43 | mA | ||
| Supply Current (HCSL, output enabled) | IDD | 41 | 44 | mA | ||
| Supply Current (Tristate, output disabled) | IDD | 18 | mA | |||
| OE "1" Setting VIH | VIH | See Note | 0.80 x VDD | V | ||
| OE "0" Setting VIL | VIL | See Note | 0.20 x VDD | V | ||
| OE Internal Pull-Up/Pull-Down Resistor | RI | 45 | k | |||
| Operating Temperature | TA | 40 | 85 | C | ||
| Output Clock Frequency Characteristics | ||||||
| Nominal Frequency (CMOS, Dual CMOS) | FO | 0.1 | 212.5 | MHz | ||
| Nominal Frequency (LVDS/LVPECL/HCSL) | FO | 0.1 | 250 | MHz | ||
| Total Stability (Grade C) | 30 | +30 | ppm | |||
| Total Stability (Grade B) | 50 | +50 | ppm | |||
| Total Stability (Grade A) | 100 | +100 | ppm | |||
| Temperature Stability (Grade C) | 20 | +20 | ppm | |||
| Temperature Stability (Grade B) | 25 | +25 | ppm | |||
| Temperature Stability (Grade A) | 50 | +50 | ppm | |||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 10 | ms | ||
| Disable Time (FO 10 MHz) | TD | 5 | s | |||
| Disable Time (FO | TD | 40 | s | |||
| Enable Time (FO 10 MHz) | TE | 20 | s | |||
| Enable Time (FO | TE | 60 | s | |||
| Output Clock Levels and Symmetry | ||||||
| CMOS Output Logic High | VOH | 0.85 x VDD | V | |||
| CMOS Output Logic Low | VOL | 0.15 x VDD | V | |||
| CMOS Output Rise/Fall Time (20 to 80% VDD, CL = 15 pF) | TR/TF | 0.1 to 212.5 MHz | 0.45 | 0.8 | 1.2 | ns |
| LVPECL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 | 565 | ps | ||
| HCSL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 | 470 | ps | ||
| LVDS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 350 | 800 | ps | ||
| Duty Cycle | DC | All formats | 48 | 50 | 52 | % |
Get in Touch
Have questions about our products or want to discuss a custom order? Our team is ready to help you.