Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics
Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics
Pioneering Third-Generation Semiconductor Solutions
Substrate Core Features
- Standard Formats: Available in 2", 4", 6", and 8" diameters.
- Bespoke Geometry: Custom sizing starts from micro-dimensions of 5×5 mm to client-specific layouts.
- Microvoid densities are strictly maintained below 0.1 cm⁻².
- Exceptional resistivity control (≤0.0006 Ω·cm) ensures maximum device yield and reliability.
- Optimized for intense fabrication steps like high-temperature oxidation and advanced lithography.
- Superior surface flatness achieved at λ/10 @632.8 nm.
Material Properties & Advantages
Boasting a remarkable electron mobility of 1,100 cm²/V·s, our 3C-SiC significantly eclipses standard 4H-SiC (900 cm²/V·s), translating to minimal conduction losses. Its 3.2 eV wide bandgap empowers the substrate to handle massive voltage loads up to 10 kV.
With a thermal conductivity rating of 49 W/m·K, it effortlessly surpasses conventional silicon. This allows devices to operate securely across extreme temperature spectrums, from cryogenic -200°C up to blistering 1,600°C environments.
Highly impervious to aggressive acids, strong alkalis, and intense ionizing radiation, making it the material of choice for nuclear infrastructure and deep-space aerospace modules.
Detailed Technical Specifications
| Parameter | Z-Grade (Zero MPD Production) |
P-Grade (Standard Production) |
D-Grade (Dummy Grade) |
|---|---|---|---|
| Diameter | 145.5 mm – 150.0 mm | ||
| Thickness | 350 μm ± 25 μm | ||
| Wafer Orientation | Off axis: 2.0°–4.0° toward [1120] ± 0.5° (4H/6H-P) On axis: <111> ± 0.5° (3C-N) |
||
| * Micropipe Density | 0 cm⁻² | ||
| * Resistivity (p-type 4H/6H-P) | ≤ 0.1 Ω·cm | ≤ 0.3 Ω·cm | |
| * Resistivity (n-type 3C-N) | ≤ 0.8 mΩ·cm | ≤ 1.0 mΩ·cm | |
| Primary Flat Orientation | 4H/6H-P: {1010} ± 5.0° | 3C-N: {110} ± 5.0° | ||
| Primary Flat Length | 32.5 mm ± 2.0 mm | ||
| Secondary Flat Length | 18.0 mm ± 2.0 mm | ||
| Secondary Flat Orientation | Silicon face up, 90° CW from Prime flat ± 5.0° | ||
| Edge Exclusion Area | 3 mm | 6 mm | |
| LTV / TIV / Bow / Warp | ≤ 2.5 μm / ≤ 5 μm / ≤ 15 μm / ≤ 30 μm | ≤ 10 μm / ≤ 15 μm / ≤ 25 μm / ≤ 40 μm | |
| * Roughness (Polish) | Ra ≤ 1 nm | ||
| * Roughness (CMP) | Ra ≤ 0.2 nm | Ra ≤ 0.5 nm | |
| Edge Cracks | None | Cum. length ≤ 10 mm, single ≤ 2 mm | |
| * Hex Plates | Cum. area ≤ 0.05% | Cum. area ≤ 0.1% | |
| * Polytype Areas | None | Cum. area ≤ 3% | |
| Visual Carbon Inclusions | None | Cum. area ≤ 0.05% | |
| # Si Surface Scratches | None | Cum. length ≤ 1 × wafer diameter | |
| Edge Chips | None permitted ≥ 0.2mm width/depth | Max 5 allowed, ≤ 1 mm each | |
| Si Surface Contamination | None | ||
| Packaging | Multi-wafer Cassette or Single Wafer Container | ||
Notes: Defects limits apply to the entire wafer surface except for the edge exclusion area. Scratches (*) should be checked on the Silicon face only under High Intensity Light.
Primary Application Scenarios
Recommended SiC Substrate Models
3C-SiC Substrates FAQ
Q1: What exactly is a 3C-SiC substrate?
A: 3C-SiC refers to cubic silicon carbide. It is a highly specialized semiconductor material characterized by a cubic crystalline structure. It delivers phenomenal electron mobility (1,100 cm²/V·s) and robust thermal conductivity (49 W/m·K), making it the premier choice for extreme-temperature and high-frequency circuitry.
Q2: Which industries primarily utilize 3C-SiC technology?
A: Because of its low signal loss and radiation hardness, 3C-SiC is heavily utilized in manufacturing 5G RF communication modules, high-efficiency Electric Vehicle (EV) inverters, and resilient electronics for aerospace and satellite applications.
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