CPU Industrial Automation Products 312 6ES7312-1AE14-0AB0 PLC S7
CPU 312 6ES7312-1AE14-0AB0 PLC S7 Central Processing Unit Industrial Automation Products
Application
CPU 312, the smallest S7-300 CPU. This is ideally suited to simple applications in which the advantages of TIA such as integrated communication, data management and diagnostics can however be utilized. Networking is possible using MPI or by means of CPs, the standard mode of application is, however, non-networked operation. The I/O is normally connected in a centralized configuration.
Design
The CPU 312 is equipped with the following:
- Microprocessor;
the processor achieves a processing time of 100 ns per binary instruction. - Extensive memory;
32 KB high-speed RAM (equals approx. 10 K instructions) for program components relevant to execution offers sufficient space for user programs;
SIMATIC Micro Memory Cards (max. 8 MB) as load memory for the program also allow the project to be stored in the CPU (complete with symbols and comments). - Flexible expansion capability
max. 8 modules (1-tier configuration) - MPI multi-point interface
The integrated MPI interface can establish as many as 6 connections simultaneously to S7-300/400 or to programming device, PC, OP. One of these connections is always reserved for the PG and another one for the OP. The MPI makes it possible to set up a simple network with a maximum of 16 CPUs via "global data communication". - Function
- Password protection;
a password concept protects the user program from unauthorized access. - Block encryption;
the functions (FCs) and function blocks (FBs) can be stored in the CPU in encrypted form by means of S7-Block Privacy to protect the know-how of the application. - Diagnostics buffer;
the last 500 error and interrupt events are stored in a buffer for diagnostic purposes, of which 100 are stored retentively. - Maintenance-free data backup;
retentive data is automatically backed up by the CPU if the voltage is interrupted and is available unchanged after the voltage has been reconnected.
Technical specifications
|
Article number |
6ES7312-1AE14-0AB0 |
|
|---|---|---|
|
|
CPU312, 32KB |
|
| General information | ||
| HW functional status | 01 | |
| Firmware version | V3.3 | |
| Engineering with | ||
|
STEP 7 V5.5 + SP1 or higher or STEP 7 V5.2 + SP1 or higher with HSP 218 | |
| Supply voltage | ||
| Rated value (DC) | ||
|
Yes | |
| permissible range, lower limit (DC) | 19.2 V | |
| permissible range, upper limit (DC) | 28.8 V | |
| external protection for power supply lines (recommendation) | 2 A min. | |
| Mains buffering | ||
|
5 ms | |
|
1 s | |
| Input current | ||
| Current consumption (rated value) | 650 mA | |
| Current consumption (in no-load operation), typ. | 140 mA | |
| Inrush current, typ. | 3.5 A | |
| I²t | 1 A²·s | |
| Power loss | ||
| Power loss, typ. | 4 W | |
| Memory | ||
| Work memory | ||
|
32 kbyte | |
|
No | |
|
32 kbyte | |
| Load memory | ||
|
Yes | |
|
8 Mbyte | |
|
10 y | |
| Backup | ||
|
Yes; Guaranteed by MMC (maintenance-free) | |
|
Yes; Program and data | |
| CPU processing times | ||
| for bit operations, typ. | 0.1 µs | |
| for word operations, typ. | 0.24 µs | |
| for fixed point arithmetic, typ. | 0.32 µs | |
| for floating point arithmetic, typ. | 1.1 µs | |
| CPU-blocks | ||
| Number of blocks (total) | 1 024; (DBs, FCs, FBs); the maximum number of loadable blocks can be reduced by the MMC used. | |
| DB | ||
|
1 024; Number range: 1 to 16000 | |
|
32 kbyte | |
| FB | ||
|
1 024; Number range: 0 to 7999 | |
|
32 kbyte | |
| FC | ||
|
1 024; Number range: 0 to 7999 | |
|
32 kbyte | |
| OB | ||
|
see instruction list | |
|
32 kbyte | |
|
1; OB 1 | |
|
1; OB 10 | |
|
2; OB 20, 21 | |
|
4; OB 32, 33, 34, 35 | |
|
1; OB 40 | |
|
1; OB 100 | |
|
4; OB 80, 82, 85, 87 | |
|
2; OB 121, 122 | |
| Nesting depth | ||
|
16 | |
|
4 | |
| Counters, timers and their retentivity | ||
| S7 counter | ||
|
256 | |
| Retentivity | ||
|
Yes | |
|
0 | |
|
255 | |
|
Z 0 to Z 7 | |
| Counting range | ||
|
0 | |
|
999 | |
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