SN74LVC1G11DCKR Programmable Logic ICS Logic Gates Single 3-Input Pos- AND Gate
SN74LVC1G11DCKR Programmable Logic ICS Logic Gates Single 3-Input Pos- AND Gate
1 Features
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
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ESD Protection Exceeds JESD 22
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– 2000-V Human-Body Model (A114-A)
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– 1000-V Charged-Device Model (C101)
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Available in the Texas Instruments NanoFreeTM Package
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Supports 5-V VCC Operation
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Inputs Accept Voltages to 5.5 V
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Maximum tpd of 4.1 ns at 3.3 V
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Low Power Consumption, 10-μA Maximum ICC
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±24-mA Output Drive at 3.3 V
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Ioff Supports Partial-Power-Down Mode Operation
2 Applications
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AV Receivers
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DLP Front Projection System
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Digital Picture Frames
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Digital Radio
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Digital Still Cameras
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Digital Video Cameras (DVC)
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Embedded PCs
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E-Books
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Ethernet Switchs
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GPS: Personal Navigation Devices
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Handset: Smartphones
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High-Speed Data Acquisition and Generation
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Military: Radar and Sonar
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Mobile Internet Devices
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Notebook PC and Netbooks
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Network-Attached Storage (NAS)
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Power Line Communication Modems
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Server PSU
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STB, DVR, and Streaming Media
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Speakers: USB
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Tablets: Enterprise
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Video Broadcasting and Infrastructure: Scalable Platform and IP-Based Multi-Format Transcoders
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Wireless Headsets, Keyboards, and Mice
3 Description
The SN74LVC1G11 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Device Information
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PART NUMBER |
PACKAGE |
BODY SIZE (NOM) |
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SN74LVC1G11DBV |
SOT-23 (6) |
2.90 mm × 1.60 mm |
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SN74LVC1G11DCK |
SC70 (6) |
2.00 mm × 1.25 mm |
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SN74LVC1G11DRY |
SON (6) |
1.45 mm × 1.00 mm |
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SN74LVC1G11DSF |
SON (6) |
1.00 mm × 1.00 mm |
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SN74LVC1G11YZP |
DSBGA (6) |
1.41 mm × 0.91 mm |
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