Beijing Silk Road Enterprise Management Services Co., Ltd.
                                                                                                           
Verified Supplier
17 Years
Since 2009
Menu

Dual independent LVCMOS output clock generator MICROCHIP DSC612PI3A-010T MEMS technology for devices

Price Negotiable
Price: Negotiable
MOQ: Negotiable
Delivery Time: Negotiable
Product Description

Product Overview

The DSC612 is a MEMS-based, crystal-less clock generator designed for low-power, portable, and consumer electronics applications. It offers two independent LVCMOS output clocks with frequencies ranging from 2 kHz to 100 MHz, eliminating the need for external crystals and enhancing reliability. The device features ultra-small package sizes, wide supply voltage range, and excellent frequency stability across various temperature ranges. Its configurable control pins allow for output enable/disable, standby, sleep, spread spectrum enable, and frequency select functions, making it highly adaptable to specific design needs.

Product Attributes

  • Brand: Microchip Technology Inc.
  • Certifications: AEC-Q100 Available, RoHS-Compliant, Lead-Free, MIL-STD-883E Method 2002.3 Qualified, MIL-STD-883E Method 2007.2 Qualified

Technical Specifications

ParameterSymbolMin.Typ.Max.UnitsConditions
Supply VoltageVDD1.71-3.63VNote 1
Active Supply CurrentIDD-56mAfCLK1 = 27 MHz, fCLK2 = 25 MHz, VDD = 1.8V, No Load
Active Supply Current (Sleep Mode, 1 PLL Off)IDDSL-3-mACLK2 = SLEEP, fCLK1 = 25 MHz, VDD = 1.8V, No Load
Active Supply Current (32.768 kHz Output Only)IDD32k-1.4-mACLK2 = SLEEP, fCLK1 = 32.768 kHz, VDD = 1.8V, No Load
Standby Supply CurrentISTDBY-1.0-AVDD = 1.8V/2.5V
Standby Supply CurrentISTDBY-1.5-AVDD = 3.3V
Frequency Stabilityf--20ppmAll temperature ranges
Frequency Stabilityf--25--
Frequency Stabilityf--50--
Agingf--5ppm1st year @ +25C
Agingf--1Per year after the first year-
Startup TimetSU--1.5msFrom 90% VDD to valid clock output, T = +25C
Input Logic HighVIH0.7 x VDD--V-
Input Logic LowVIL--0.3 x VDDV-
Output Disable TimetDA--200 + 2 PeriodsnsNote 5
Output Enable TimetEN-1.0-sNote 6
Output Logic HighVOHY0.8 x VDD--VI = 6 mA (high drive) or I = 3 mA (standard drive)
Output Logic LowVOLY--0.2 x VDDI = 6 mA (high drive) or I = 3 mA (standard drive)-
Output Transition Time, Rise Time/Fall Time (Standard drive)tRY1/tFY1-1.22.0nsCL = 10 pF, VDD = 1.8V
Output Transition Time, Rise Time/Fall Time (Standard drive)tRY1/tFY1-0.61.2nsCL = 10 pF, VDD = 2.5V/3.3V
Output Transition Time, Rise Time/Fall Time (High drive)tRY2/tFY2-1.01.5nsCL = 15 pF, VDD = 1.8V
Output Transition Time, Rise Time/Fall Time (High drive)tRY2/tFY2-0.51.0nsCL = 15 pF, VDD = 2.5V/3.3V
Frequencyf00.002-100MHz-
Output Duty CycleSYM45-55%-
Period Jitter, RMSJPER-17-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 1.8V
Period Jitter, RMSJPER-14-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 3.3V
Period Jitter, RMSJPER-9-psfCLK1 = 27 MHz, fCLK2 = 27 MHz or 32.768 kHz, VDD = 3.3V
Period Jitter, Peak-to-PeakJPER-120-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 1.8V
Period Jitter, Peak-to-PeakJPER-100-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 3.3V
Period Jitter, Peak-to-PeakJPER-80-psfCLK1 = 27 MHz, fCLK2 = 27 MHz or 32.768 kHz, VDD = 3.3V
Cycle-to-Cycle Jitter (peak)JCy-Cy-105-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 1.8V
Cycle-to-Cycle Jitter (peak)JCy-Cy-90-psfCLK1 = 24 MHz, fCLK2 = 27 MHz, VDD = 3.3V
Cycle-to-Cycle Jitter (peak)JCy-Cy-70-psfCLK1 = 27 MHz, fCLK2 = 27 MHz or 32.768 kHz, VDD = 3.3V
Junction Operating TemperatureTJ--+150C-
Storage Temperature RangeTS55-+150C-
Lead Temperature---+260CSoldering, 40s

Get in Touch

Have questions about our products or want to discuss a custom order? Our team is ready to help you.

Company Beijing Silk Road Enterprise Management Services Co., Ltd.
Location 16 Floor, Unit B, Jiatai International Mansion, No 41, Dongsihuan Zhong Road, Chaoyang District, Beijing
Contact Person Sellina

Request A Quote

Please check your email address.
Your message must be at least 20 characters.