128 by 1 linear sensor array with photodiodes charge amplifier and internal data hold AMS TSL1401CL
TSL1401CL - 128 x 1 Linear Sensor Array with Hold
The TSL1401CL is a 128x1 linear sensor array featuring photodiodes and associated charge amplifier circuitry with an internal pixel data-hold function for simultaneous integration start and stop times. It offers a wide dynamic range, low image lag, and operation up to 8MHz with a single 3V to 5V supply. The device simplifies operation with internal control logic requiring only a serial-input (SI) signal and a clock, and does not require an external load resistor. It is suitable for applications such as image scanning, mark and code reading, optical character recognition (OCR), contact imaging, edge detection and positioning, and optical linear and rotary encoding.
Product Attributes
- Brand: ams
- Certifications: RoHS Compliant
Technical Specifications
| Parameter | Min | Nom | Max | Unit | Notes |
|---|---|---|---|---|---|
| Supply voltage (VDD) | 3 | 5.5 | V | ||
| Input voltage range (VI) | 0 | VDD | V | ||
| High-level input voltage (VIH) | 2 | VDD | V | ||
| Low-level input voltage (VIL) | 0 | 0.8 | V | ||
| Wavelength of light source () | 400 | 1000 | nm | ||
| Clock frequency (fclock) | 5 | 8000 | kHz | ||
| Sensor integration time (tint) | 0.03375 | 100 | ms | tint(min) = (128 - 18) clock period + 20s | |
| Setup time, serial input (tsu(SI)) | 20 | ns | |||
| Hold time, serial input (th(SI)) | 0 | ns | SI must go low before the rising edge of the next clock pulse. | ||
| Operating free-air temperature (TA) | 0 | 70 | C | ||
| Analog output voltage (white, average) | 1.6 | 2 | 2.4 | V | fclock = 1MHz, VDD = 5V, TA = 25C, p = 640nm, tint = 5ms, RL = 330, Ee = 11W/cm2 |
| Analog output voltage (dark, average) | 0 | 0.1 | 0.2 | V | Ee = 0 |
| Pixel response nonuniformity (PRNU) | 4% | 10% | Includes DSNU. | ||
| Nonlinearity of analog output voltage | 0.4% | Percent of analog output voltage (white). | |||
| Output noise voltage (RMS) | 1 | mVrms | |||
| Responsivity (Re) | 25 | 35 | 45 | V/(J/cm2) | |
| Analog output saturation voltage (Vsat) VDD = 5V, RL = 330 | 4.5 | 4.8 | V | ||
| Analog output saturation voltage (Vsat) VDD = 3V, RL = 330 | 2.5 | 2.8 | V | ||
| Saturation exposure (SE) VDD = 5V | 136 | nJ/cm2 | |||
| Saturation exposure (SE) VDD = 3V | 78 | nJ/cm2 | |||
| Dark signal nonuniformity (DSNU) | 0.02 | 0.05 | V | All pixels, Ee = 0. | |
| Image lag | 0.5% | Typ | |||
| Supply current (IDD) VDD = 5V, Ee = 0 | 2.8 | 4.5 | mA | ||
| Supply current (IDD) VDD = 3V, Ee = 0 | 2.6 | 4.5 | mA | ||
| High-level input current (IIH) VI = VDD | 1 | A |
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