Product Overview
The Broadcom HCPL-90xx and HCPL-09xx series are high-speed CMOS digital isolators designed for robust performance and excellent transient immunity. Featuring a symmetric magnetic coupling barrier, these isolators deliver industry-leading speed with a typical pulse width distortion of 2 ns, propagation delay skew of 4 ns, and a 100 Mbaud data rate. Available in single, dual, and quad-channel configurations, they offer flexible solutions for isolating data conversion devices, parallel buses, peripheral interfaces, and digital fieldbus applications. They support 3.3V and 5V TTL/CMOS logic levels and are rated for 2500V RMS isolation, with UL1577 and IEC 61010-1 approvals. These devices are specified for operation over a wide temperature range of -40C to +100C.
Product Attributes
- Brand: Broadcom
- Technology: CMOS Digital Isolators
- Certifications: UL1577, IEC 61010-1
- ESD Sensitivity: Requires normal static precautions
- Not for: or aerospace applications/environments
Technical Specifications
| Model Series | Channel Configuration | Package Type | Data Rate | Isolation Voltage (RMS) | Pulse Width Distortion (Typ.) | Propagation Delay Skew (Typ.) | Operating Temperature |
| HCPL-90xx / HCPL-09xx | Single | 8-pin PDIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Dual (Unidirectional) | 8-pin DIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Dual (Bidirectional) | 8-pin DIP (300 Mil), 8-pin SOIC | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (Unidirectional) | 16-pin SOIC Wide Body, 16-pin SOIC Narrow Body | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (2 channels one direction, 2 opposite) | 16-pin SOIC Wide Body, 16-pin SOIC Narrow Body | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Quad (1 channel one direction, 3 opposite) | 16-pin SOIC Wide Body, 16-pin SOIC Narrow Body | 100 Mbaud | 2500V | 2 ns | 4 ns | -40C to +100C |
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
| General Features |
| Pulse Width Distortion | PWD | | 2 | 3 | ns | |
| Propagation Delay Skew | tPSK | | 4 | 6 | ns | |
| Data Rate | | 100 | 110 | | MBd | CL = 15 pF |
| Common Mode Rejection | | 15 | | | kV/s | min. |
| Isolation | | 2500 | | | V RMS | |
| TTL/CMOS Compatibility | | 3.3V, 5V | | | | |
| Propagation Delay (Max.) | | | | 15 | ns | |
| Electrical Specifications (5V Operation) |
| Quiescent Supply Current 1 | IDD1 | | 0.012 | 0.018 | mA | VIN = 0V |
| Quiescent Supply Current 2 | IDD2 | | 5.0 | 6.0 | mA | VIN = 0V |
| Logic Input Current | IIN | -10 | | 10 | A | |
| Logic High Output Voltage | VOH | 0.8 * VDD2 | | VDD2 0.5 | V | IOUT = 4 mA, VIN = VIH |
| Logic Low Output Voltage | VOL | | 0.5 | 0.8 | V | IOUT = 4 mA, VIN = VIL |
| Switching Specifications (5V Operation) |
| Propagation Delay (Low to High) | tPHL | | 10 | 15 | ns | |
| Propagation Delay (High to Low) | tPLH | | 10 | 15 | ns | |
| Pulse Width | tPW | 10 | | | ns | |
| Output Rise Time | tR | | 1 | 3 | ns | (10% to 90%) |
| Output Fall Time | tF | | 1 | 3 | ns | (10% to 90%) |
| Channel-to-Channel Skew | tCSK | | 2 | 3 | ns | (Dual and Quad Channels) |
| Common Mode Transient Immunity | |CMH|, |CML| | 15 | 18 | | kV/s | Vcm = 1000V |
| Electrical Specifications (3.3V Operation) |
| Quiescent Supply Current 1 | IDD1 | | 0.008 | 0.01 | mA | VIN = 0V |
| Quiescent Supply Current 2 | IDD2 | | 3.3 | 4.0 | mA | VIN = 0V |
| Logic High Output Voltage | VOH | 0.8 * VDD2 | | VDD2 0.5 | V | IOUT = 4 mA, VIN = VIH |
| Logic Low Output Voltage | VOL | | 0.5 | 0.8 | V | IOUT = 4 mA, VIN = VIL |
| Switching Specifications (3.3V Operation) |
| Propagation Delay (Low to High) | tPHL | | 12 | 18 | ns | |
| Propagation Delay (High to Low) | tPLH | | 12 | 18 | ns | |
| Output Rise Time | tR | | 2 | 4 | ns | (10% to 90%) |
| Output Fall Time | tF | | 2 | 4 | ns | (10% to 90%) |
| Channel-to-Channel Skew | tCSK | | 2 | 3 | ns | (Dual and Quad Channels) |
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
| Package Characteristics |
| Capacitance (Input-Output) | CI-O | | | | pF | f = 1 MHz |
| Capacitance (Single Channel) | CI-O | | 1.1 | | pF | |
| Capacitance (Dual Channel) | CI-O | | 2.0 | | pF | |
| Capacitance (Quad Channel) | CI-O | | 4.0 | | pF | |
| Barrier Resistance | | >1014 | | | | |
| Barrier Capacitance | | | 3 | | pF | (Single/Dual Channel) |
| Barrier Capacitance | | | 7 | | pF | (Quad Channel) |
| Creepage Distance (External) | | | | | mm | |
| Creepage Distance (8-Pin PDIP) | | 7.04 | | | mm | |
| Creepage Distance (8-Pin SOIC) | | 4.04 | | | mm | |
| Creepage Distance (16-Pin SOIC Narrow) | | 4.03 | | | mm | |
| Creepage Distance (16-Pin SOIC Wide) | | 8.08 | | | mm | |
| Leakage Current | | | 0.2 | | A | 240 Vrms, 60 Hz |
| Parameter | Symbol | Min. | Max. | Unit | Test Conditions |
| Absolute Maximum Ratings |
| Storage Temperature | TS | -55 | 150 | C | |
| Ambient Operating Temperature | TA | -55 | 125 | C | (Device will not be damaged; performance not guaranteed) |
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | |
| Input Voltage | VIN | -0.5 | VDD1 + 0.5 | V | |
| Output Enable Voltage | VOE | -0.5 | VDD2 + 0.5 | V | (HCPL-9000/-0900) |
| Output Voltage | VOUT | -0.5 | VDD2 + 0.5 | V | |
| Output Current Drive | IOUT | | 10 | mA | |
| Lead Solder Temperature | | | 260 | C | (10s) |
| ESD (Human Body Model) | | 2 | | kV | |
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
| Recommended Operating Conditions |
| Ambient Operating Temperature | TA | -40 | 100 | C | |
| Supply Voltage | VDD1, VDD2 | 3.0 | 5.5 | V | |
| Logic High Input Voltage | VIH | 2.4 | VDD1 | | V | |
| Logic Low Input Voltage | VIL | 0 | 0.8 | | V | |
| Input Signal Rise/Fall Times | tIR, tIF | | 1 | | s | |