Plastic Encapsulated Glass Passivated Triac LGE BT136S-600E for Sensitive Gate Switching and Control

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Product Description

Product Overview

The BT136S/M Series E Triacs are glass-passivated, sensitive gate triacs in a plastic envelope, designed for surface mounting. They are suitable for general-purpose bidirectional switching and phase control applications requiring high sensitivity in all four quadrants.

Product Attributes

Brand: BT136S/M Series E
Material: Glass passivated
Certifications: Plastic meets UL94 V0 at 1/8"
Origin: http://www.luguang.cn
Contact: mail:lge@luguang.cn

Technical Specifications

Symbol	Parameter	Conditions	BT136S-500E	BT136S-600E	BT136S-800E	Unit
VDRM	Repetitive peak off-state voltage		500	600	800	V
IT(RMS)	RMS on-state current	full sine wave; Tmb 107 C	4	4	4	A
ITSM	Non-repetitive peak on-state current	full sine wave; Tj = 25 C prior to surge; t = 20 ms	25	25	25	A
ITSM	Non-repetitive peak on-state current	full sine wave; Tj = 25 C prior to surge; t = 16.7 ms	27	27	27	A
I2t	I2t for fusing	t = 10 ms	3.1	3.1	3.1	A2s
dIT/dt	Repetitive rate of rise of on-state current	ITM = 6 A; IG = 0.2 A; dIG/dt = 0.2 A/s after triggering	50 (T2+ G+, T2+ G-, T2- G-)	50 (T2+ G+, T2+ G-, T2- G-)	50 (T2+ G+, T2+ G-, T2- G-)	A/s
dIT/dt	Repetitive rate of rise of on-state current	ITM = 6 A; IG = 0.2 A; dIG/dt = 0.2 A/s after triggering	10 (T2- G+)	10 (T2- G+)	10 (T2- G+)	A/s
IGM	Peak gate current		2	2	2	A
VGM	Peak gate voltage		5	5	5	V
PGM	Peak gate power		5	5	5	W
PG(AV)	Average gate power over any 20 ms period		0.5	0.5	0.5	W
Tstg	Storage temperature		-40	-40	-40	C
Tj	Operating junction temperature		125	125	125	C
Rth j-mb	Thermal resistance junction to mounting base	full cycle	3.0	3.0	3.0	K/W
Rth j-mb	Thermal resistance junction to mounting base	half cycle	3.7	3.7	3.7	K/W
Rth j-a	Thermal resistance junction to ambient	pcb (FR4) mounted; footprint as in Fig.14	75	75	75	K/W
IGT	Gate trigger current	VD = 12 V; IT = 0.1 A (T2+ G+)	2.5	2.5	2.5	mA
IGT	Gate trigger current	VD = 12 V; IT = 0.1 A (T2+ G-)	4.0	4.0	4.0	mA
IGT	Gate trigger current	VD = 12 V; IT = 0.1 A (T2- G-)	5.0	5.0	5.0	mA
IGT	Gate trigger current	VD = 12 V; IT = 0.1 A (T2- G+)	11	11	11	mA
IL	Latching current	VD = 12 V; IGT = 0.1 A (T2+ G+)	3.0	3.0	3.0	mA
IL	Latching current	VD = 12 V; IGT = 0.1 A (T2+ G-)	10	10	10	mA
IL	Latching current	VD = 12 V; IGT = 0.1 A (T2- G-)	2.5	2.5	2.5	mA
IL	Latching current	VD = 12 V; IGT = 0.1 A (T2- G+)	4.0	4.0	4.0	mA
IH	Holding current	VD = 12 V; IGT = 0.1 A	2.2	2.2	2.2	mA
VT	On-state voltage	IT = 5 A	1.4	1.4	1.4	V
VT	On-state voltage	IT = 5 A	1.70	1.70	1.70	V
VGT	Gate trigger voltage	VD = 12 V; IT = 0.1 A	0.7	0.7	0.7	V
VGT	Gate trigger voltage	VD = 12 V; IT = 0.1 A	1.5	1.5	1.5	V
VGT	Gate trigger voltage	VD = 400 V; IT = 0.1 A; Tj = 125 C	0.25	0.25	0.25	-
VGT	Gate trigger voltage	VD = 400 V; IT = 0.1 A; Tj = 125 C	0.4	0.4	0.4	-
ID	Off-state leakage current	VD = VDRM(max); Tj = 125 C	0.1	0.1	0.1	mA
ID	Off-state leakage current	VD = VDRM(max); Tj = 125 C	0.5	0.5	0.5	mA
dVD/dt	Critical rate of rise of off-state voltage	VDM = 67% VDRM(max); Tj = 125 C; exponential waveform; gate open circuit	50	50	50	V/s
tgt	Gate controlled turn-on time	ITM = 6 A; VD = VDRM(max); IG = 0.1 A; dIG/dt = 5 A/s	2	2	2	s