IC Substrate Board

BT (Bismaleimide Triazine) resin substrates, originally developed by Mitsubishi Gas Chemical, represent the dominant substrate material for semiconductor IC packaging. Over 70% of organic IC package substrates use BT-based laminate systems. This high-performance thermoset polymer combines a high glass transition temperature (Tg) of 185-225°C with ultra-low moisture absorption (0.3-0.5%) and low dielectric constant (Dk 3.4-4.0 @ 1 GHz), enabling reliable signal routing between

BT IC substrate product line is engineered for advanced package formats including FC-CSP (Flip Chip Chip Scale Package) and WB-BGA (Wire Bond Ball Grid Array). BT resin, with its high glass transition temperature (180-225°C), low moisture absorption (0.3-0.5%), and fine-line capability (10/10 μm), enables high-density interconnection for memory controllers, RF modules, and mobile application processors. The substrate redistributes fine-pitch die bumps (40-130 μm pitch) to the

BT IC substrate is specifically engineered for high-frequency 5G RF modules, Antenna-in-Package (AiP), and millimeter-wave communication applications. Modified BT resin systems achieve dissipation factor (Df) as low as 0.005 @ 28 GHz through spherical silica-filled formulations. These substrates support 14-layer any-layer structures with embedded bandpass impedance transformers for compact 28 GHz AiP modules . With stable dielectric properties across frequency (Dk 3.4-4.0 ,

BT IC substrate is engineered for automotive electronics requiring AEC-Q100 Grade 2 compatibility and extended temperature cycling reliability. BT resin's high glass transition temperature (180-225°C), low CTE (12-16 ppm/°C), and ultra-low moisture absorption (0.3-0.5%) provide the thermal and mechanical stability demanded by under-hood control modules, radar systems, and high-temperature environments. Available in 2-12 layer configurations with line/space down to 10/10 μm

Coreless ETS (Embedded Trace Substrate) BT IC substrate eliminates the thick glass-cloth reinforced core to achieve ultra-thin profiles (as thin as 0.13 mm for 2-6 layer structures) and superior warpage control. By embedding the outermost circuit pattern directly into the BT insulating material, ETS technology enables fine line/space down to 12/12 μm (sample) and 12/18 μm (mSAP production). The coreless construction reduces overall package height for FC-CSP applications (3*3